Flock surveillance cameras can pose a crash risk for drivers, US experts say
THE SO WHAT
AI-powered roadside surveillance is colliding with basic road safety—if cameras distract drivers or violate standards, expect regulatory and legal pushback. For cities and vendors, the procurement question shifts from “does it improve policing?” to “can we defend this on safety and civil-liberties grounds at the same time.”
READ THE SOURCE
MORE FROM THE WIRE
Deep & Emerging TechDOGE Veterans Are Landing Big Jobs at Prediction Markets
Prediction markets are pulling in meme-coin operators because they know how to manufacture attention and liquidity under regulatory fog. If you’re building in this space, assume the competitive bar is not just product and UX — it’s community ops tuned for scrutiny from day one.
Deep & Emerging TechSources: TSMC is developing advanced AI chip packaging tech, internally called "EMIB-like", similar to Intel's Embedded Multi-die Interconnect Bridge technique
If TSMC brings an EMIB-like bridge in-house, advanced packaging becomes less of a single-vendor differentiator and more of a baseline for AI accelerators. For infra buyers, the medium-term upside is more options on high-bandwidth multi-die designs — but also more complexity in qualifying heterogeneous packages.
Deep & Emerging TechOld Dominion Freight Line reaches 70.1% operating ratio in Q2
A 70.1% operating ratio plus higher capex at Old Dominion means well-run carriers are reinvesting margin into network and equipment while others are still chasing volume. Shippers should expect service quality gaps to widen — and should be consolidating freight with carriers that are clearly funding long-term resilience.
Deep & Emerging TechNext-gen Ryzen could be a monster: 5 clues from AMD’s Zen 6 reveal
Zen 6 hints that desktop and server CPUs will keep getting more AI-friendly and power-efficient, extending the useful life of general-purpose compute alongside GPUs. If you’re planning refresh cycles, don’t treat AI workloads as GPU-only — there’s likely headroom in upcoming CPU generations that can offload or complement accelerator spend.